Contract CMP planarization of TSV and TGV filled-metal surfaces
Chemical-mechanical polish of copper-filled through-silicon or through-glass vias so the metal and substrate finish as a single plane for subsequent interconnect.
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Problem solved
Filled TSV/TGV wafers and glass coupons leave Cu proud of the dielectric; without CMP the next wiring level cannot be patterned at package density.
Application contexts
- TSV wafer mid-end planarization
- TGV glass-coupon or wafer planarization after Cu fill
- Damascene Cu CMP process development
Technical principle
Company page describes CMP as combined chemical and mechanical removal on a pad with slurry, used here to clear overburden Cu from filled through-vias in Si, ceramic or glass. Same page lists damascene trench fill and interlayer-dielectric flatten as sibling processes, with tools from chip-size to 300 mm plus post-CMP clean.
Typical use cases
- CMP recipe development on customer-supplied TGV coupons
- Small-lot Cu overburden clear after via fill
Partnership route
How global engineering teams typically engage this asset.
Helpful to include: Si wafer vs glass coupon / panel · Cu overburden thickness · target dishing / erosion · lot size and cleanroom requirements
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Source & provenance
Translation review status: unreviewed. Publication does not establish technical verification or supplier endorsement.
Original language: JA.
Record updated: .
- 半導体CMP受託加工サービス
https://www.kitagawagt.co.jp/business/semiconductor-contract-processing/
Primary-source candidate; evidence review: pending.
Source accessed / recorded (collector timestamp): .
Source publication date: Not recorded.
Collector timestamps record when a source was stored, not an independent verification date. Source links provide context; they do not validate every specification, readiness label, certification, or proposed partnership route.